Original Link: https://www.anandtech.com/show/1381



Even though Intel is facing a marketing disaster with the recall of initial 925X/915P motherboards, the company is already looking to launch its next generation chipset in less than nine months time. The next generation chipsets, Glenwood (high end) and Lakeport (mainstream), will replace 925 and 915 respectively. Although roadmaps did not detail any information other than the late Q2'05 launch date, we can probably safely assume 1066FSB support (from at least Glenwood), PCI-Express, DDR2, and most likely a bump in DX9 graphics for the Lakeport discrete graphics platform.

Along with the Lakeport/Glenwood introduction, the newest Intel roadmaps discussed another slightly surprising stepping for virtually all new CPUs. We are all familiar with AMD's much coveted "NX" or "No eXecute" feature; the Opteron/Athlon64 processor flags an exception when memory pages are marked as non-executable. If a malicious piece of code attempts to overwrite data in memory with instructions, the CPU will refuse to execute that page. Intel is also jumping on the NX bandwagon with its version of the technology called "XD", or "eXecute Disable." All Prescott based CPUs including Pentium 4, Xeon and Celeron D will support the XD feature with the "E-0" processor stepping. The Intel roadmaps hinted that these XD-enabled processors are detectable by a slightly different SKU. For example, a E-0 stepped Intel 520 processor may be marked as 520J. It is also said that a majority of new Pentium M processors will carry XD functionality. Unfortunately, these new "J" suffixed units are only for the Socket 775 architecture.

Although this seems like a fairly simply technology to implement, the lack of support from the operating system renders the function useless. Thus Windows XP SP2, Windows Server 2003 SP1 and dozens of Linux/BSD operating systems are all adopting (or have already adopted) the NX methodology of stack protection. Considering all hype around AMD's Sempron processor, the XD protection may force AMD to adopt their NX technology across all processors. Remember, only the high end, upcoming Sempron processors are NX enabled.

Unfortunately, the XD feature comes with an unusual perquisite; Intel's PAE-36 must be enabled for XD to work. PAE-36, as you may recall, is Intel's quasi-solution to the 4GB memory addressing issue on x86 processors. Although PAE-36 has been around for a while, it is relatively unvalidated across the mainstream market segment. Intel may face the issues of getting manufacturers and end users into the habit of turning PAE compatibility on by default.

Other smaller additions are also incorporated into the E-0 processor stepping. A newer Thermal Monitoring revision and Enhanced Halt State will show up on the new CPUs. These minor tweaks may also go a long way as to how far the extremely warm Prescott processors succeed.

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